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AR# 60638

GTXE2_COMMON placement can be wrong when it does not directly drive GTXE2_CHANNEL

Description

There is a known limitation in setting the BIAS_CFG setting without instantiating the GTXE2_COMMON.

GTXE2_COMMON should be placed with the GTXE2_CHANNEL(s) within the same quad.

See (Xilinx Answer 43339) - 7 Series FPGA GTX Transceiver - Software Use Model Changes

However, the GTXE2_COMMON is not always placed in the same quad by the placer and this can lead to the following critical messages during route_design:

 

Phase 3.1 Initial Routing Verification

 

Post Initial-Routing Verification

---------------------------------

CRITICAL WARNING: [Route 35-54] Net: i_trif_gtx_common/gtrefclk0[2] is not completely routed.

Resolution: Run report_route_status for more information.

Resolution: Run report_route_status for more information.

 

Unroutable connection Types:

----------------------------

Type 1 : IBUFDS_GTE2.O->GTXE2_CHANNEL.GTREFCLK0

-----Num Open nets: 8

-----Representative Net: Net[47553] i_trif_gtx_common/gtrefclk0[2]

-----IBUFDS_GTE2_X0Y0.O -> GTXE2_CHANNEL_X0Y2.GTREFCLK0

-----Driver Term: i_trif_gtx_common/g_quad[2].i_ibufds_gte2_0/O Load Term [170722]: g_trif_twin[1].i_trif_twin/g_twin[0].i_trif/i_trif_gtx/gtxe2_i/GTREFCLK0

Phase 3.1 Initial Routing Verification | Checksum: 1037bd02a


Solution

This is a known limitation in Vivado Design Suite 2013.4 and 2014.1 and will be resolved in a future release of the software. 

Critical warnings will be received if a design has this issue.  

To work around this issue, lock down the GTXE2_COMMON in the same quad as the GTXE2_CHANNEL primitive(s).

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
43339 7 Series FPGA GTX Transceiver - Software Use Model Changes N/A N/A
AR# 60638
Date Created 05/13/2014
Last Updated 05/14/2014
Status Active
Type General Article
Devices
  • Kintex-7
  • Kintex-7Q
Tools
  • Vivado Design Suite - 2014.1