We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 61032

Vivado IP Integrator: Address mapping for AXI bridge not visible when expanded and connected?


Why can I not see the address mapping for AXI bridge when expanded and connected?


All bridges are packed as transparent.

The bridges do not have any register space of their own.

IPI is entirely interface related, any interface when expanded loses all of it's properties.

So for any AXI bridge connected in the block design it should be connected through the AXI bus rather than expanding the bus and connecting individual signals in bus.
AR# 61032
Date Created 06/06/2014
Last Updated 06/11/2014
Status Active
Type General Article