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AR# 61064

2014.1- Zynq-7000- How to use Write Protect and Card Detect Signals with Micro-SD/SD Card?


My SDIO/SD card does not have Write Protect and Card Detect Signals.

How can I use these signals with Zynq SDIO SoC?

When using a Micro-SD/SD Card how can I Write Protect?

Micro-SD does not have a Write Protect signal, how do I use SDIO with a Zynq device?


In Zynq devices, the Signals card detect (CDn) and write protect (WPn) are required for the Zynq SD card interface to work.

Hardware signal connection:
  • Card Detect (CDn) & Write Protect (WPn) pins are usually pulled to GND when a card is detected and the card is write-enabled (In normal operation).
  • For SD/SDIO card connect, card detect (CDn) & write protect (WPn) signals need to be Pulled up with a 20K to 50K resistor. Refer to (UG585) page.363 figure-13-8.
  • For a Micro-SD card, the Write protect (WPn) signal is not present (does not exist) at the SD card slot as well as at the physical card in the form of a switch button like in a standard SD/SDIO card.
    Define the MIO/EMIO dummy signal with an external pull-down 1K ohm resistor to ensure that the Micro-SD card will be in Write Enable mode, otherwise the Micro-SD card will be in Write Protect mode.
Software test an assignments:

a.        Once the Zynq Wizard has assigned the MIO/EMIO signal to the device, ensure that the settings get correctly set in PS7_init.tcl and PS7_init.c

i.      We are looking for SD0_WP_CD_SEL registers in the PS7_init.tcl or PS7_init.c files (use a normal Text editor to view/modify)

1.       SD0_WP_CD_SEL register descriptions please refer TRM.ug585.V1.7.page.1675.

2.       EMIT_MASKWRITE(0XF8000830, 0x003F0000U ,0x00000000U) By default after RESET & both signals are not defined in Zynq software, then it automatically assign the WPn = MIO[0] & CDn = MIO[0]

3.       If user define the signals as WPn at MIO[46] & CDn at MIO[39] , check the mask register settings in the init TCL/C file as below:

a.  EMIT_MASKWRITE(0XF8000830, 0x003F003FU ,0x0027002EU)

b.  FYI If the settings are not correct then correct it according to the signal definition and run the FSBL to detect card in write_enable 

AR# 61064
Date Created 06/09/2014
Last Updated 03/30/2015
Status Active
Type General Article
  • SoC
  • XA Zynq-7000
  • Zynq-7000
  • Zynq-7000Q
  • ISE Design Suite - 14
  • Vivado Design Suite - 2014.1
  • Vivado Design Suite - 2014.2
  • More
  • Vivado Design Suite - 2013.4
  • Vivado Design Suite - 2013.3
  • Vivado Design Suite - 2013.2
  • Less
  • Memory Interface
  • Peripheral (UART, SPI, IIC, GPIO, Other)
Boards & Kits
  • Zynq-7000 All Programmable SoC Boards and Kits