In My UltraScale project, I have a differential I/O IP connected to my PCIe.
However, if I instantiate this design, I receive an error similar to the below:
How can I address this?
To fix this issue, please follow the instructions below:
1. Exit Vivado
2. Unzip the attached zip archive.
3. Navigate to C:\Xilinx\Vivado\2014.2\data\rsb\iprepos.
4. Copy the util_ds_buf_v1_0 file extracted from the archive into the plugins director.
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