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AR# 61254

Does the Memory IP AXI interface check for 4KB boundary violations?

Description

Does the AXI interface check for 4KB boundary violations?

Solution

The Memory IP AXI interface does not check for 4KB boundaries violations.

It is the user's responsibility to prevent crossing of the 4KB boundaries. Otherwise the read data might not be aligned.

Revision History:

  • 06/26/2014 - Initial Release
  • 02/13/2018 - Updated to include UltraScale family
AR# 61254
Date 02/15/2018
Status Active
Type General Article
Devices
  • Virtex-7
  • Artix-7
  • Kintex-7
  • More
  • Zynq-7000
  • Virtex UltraScale
  • Virtex UltraScale+
  • Kintex UltraScale
  • Kintex UltraScale+
  • Zynq UltraScale+ MPSoC
  • Zynq UltraScale+ RFSoC
  • Less
IP
  • MIG 7 Series
  • MIG UltraScale
  • DDR4 SDRAM
  • More
  • DDR3 SDRAM
  • LPDDR3
  • LPDDR2
  • Less
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