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AR# 61480

Zynq-7000, GNU GCC - is it possible to set the GCC compiler to use VCVTR instruction?


If the ELF is viewed with the FPU enabled, GCC will use the VCVT instruction when a floating-point variable is assigned (and hence converted) to an integer.


As per the (ARM Architecture Reference Manual) VCVT uses the Round to Zero mode. 

To use another rounding mode (for example Round to Nearest (RN) mode) the VCVTR instruction should be used instead of VCVT.

If R is specified, the operation uses the rounding mode specified by the FPSCR.

From the ARM:

The floating-point to integer operation normally uses the Round towards Zero rounding mode, but can optionally use the rounding mode specified by the FPSCR.

The FPSCR Register bit function FPSCR[23:22] defines different rounding modes.

When FPSCR[23:22] = 0b00, Round to Nearest (RN) mode is set. 

Is it possible to set the compiler to use the VCVTR instruction?


There is no currently known way to direct GCC ARM FPU conversions, so assembly must be used in this case.

A synchronization barrier (ISB) is also required after modifying the rounding configuration register.

Round to Zero is used because the C specification states that truncation (round to zero) is sufficient for the conversion.
The below is from the C programming language standard section "Real floating and integer" in http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1124.pdf

"When a value of real floating type is converted to an integer type other than _Bool, the fractional part is discarded (i.e., the value is truncated toward zero).

If the value of the integral part cannot be represented by the integer type, the behavior is undefined"


AR# 61480
Date 07/16/2014
Status Active
Type General Article
  • SoC
  • Vivado Design Suite - 2014.2
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