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AR# 61611

Design Advisory for Kintex UltraScale ASCII Package Files Update

Description

This design advisory is being released as a notification that several of the ASCII pinout files for Kintex UltraScale packages that were available from http://www.xilinx.com/support/packagefiles/ultrascale-pkgs.htm prior to 6/26/2014 contained incorrect packaging details.


Redesign may be required for several packages if these old ASCII files were used for board layout. 


Pinouts generated from Vivado 2014.1 and later are not impacted by any significant changes, though there are some minor syntactical differences.

 

Solution

Several issues were identified with ASCII package pinout files available from Xilinx.com prior to 6/26/2014. 

These ASCII package files contained incorrect packaging details that could require a redesign if these old ASCII files were used for board layout. 

While several devices contain only minor syntactical changes, several package files contain changes that will require an update before being used for board layout.

Updated and accurate ASCII pinout files for Kintex UltraScale packages can be found here:

Impacts of changes by device:
 
Several packages were released that have incorrect pin definition that will substantially impact board design.  
 
Significant changes indicate major issues that would cause the board to fail if not addressed, such as a pin changing from VCCAUX to VCCINT.
 
ASCII Package File with Significant Changes

Comments

XCKU060FFVA1517 Significant Pinout changes. Board design will be impacted. 
XCKU075FFVA1517 Significant Pinout changes. Board design will be impacted. MGTRREF/MGTAVTTRCAL pins previously assigned to quad 230 now NC
XCKU100FLVA1517 Significant Pinout changes. Board design will be impacted. 
XCKU100FLVD1924 Significant Pinout changes. Board design will be impacted. 
XCKU100FLVF1924 Significant Pinout changes. Board design will be impacted. 
XCKU115FLVA1517 Significant Pinout changes. Board design will be impacted. 
XCKU115FLVD1924 Significant Pinout changes. Board design will be impacted. 
XCKU115FLVF1924 Significant Pinout changes. Board design will be impacted. 
 
Several packages have minor changes that are primarily syntactical and should not cause design issues with board designs using these older files. 
 
ASCII Package File with Minor Changes

Comments

XCKU035FBVA676 MGTRREF/MGTAVTTRCAL  pins  changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
XCKU035FBVA900 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
XCKU035FFVA1156 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
XCKU040FBVA676 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
XCKU040FBVA900 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
XCKU040FFVA1156 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
XCKU060FFVA1156 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.  No Connect Column changes device from "XCKU040" to "KU040".
XCKU075FFVA1156 MGTRREF/MGTAVTTRCAL  pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.
 
Package Files Extracted From Vivado:
 

Pinouts extracted from Vivado 2014.1 or 2014.2 are correct except for minor changes in naming convention for MGTRREF/MGTAVTTRCAL pins, and the changes in some MGTRREF/MGTAVTTRCAL to NC noted earlier for the XCKU075.  

 

The minor changes in naming convention for RREF/RCAL pins changes the location suffix from the previous quad number to a letter designation denoting the power supply group.  

Below are the changes for the XCKU040 for example:

  

Package

Pin

2014.2 Package File

Current ASCII & 2014.3 Package File

XCKU040FBVA676

AF7

MGTRREF_225

MGTRREF_R

XCKU040FBVA676

AF8

MGTAVTTRCAL_225

MGTAVTTRCAL_R

XCKU040FBVA900

AK5

MGTRREF_225

MGTRREF_R

XCKU040FBVA900

AK6

MGTAVTTRCAL_225

MGTAVTTRCAL_R

XCKU040FFVA1156

AP5

MGTRREF_225

MGTRREF_R

XCKU040FFVA1156

AP6

MGTAVTTRCAL_225

MGTAVTTRCAL_R



Identifying an out of date ASCII pinout file:
 
The verified ASCII files have a revision date of 6/16/2014 or later.  The older ASCII files that have significant changes have revision dates from 2013.  
The first line of the pinout file will contain the revision date, which in the example below is 6/16/2014 indicating an updated file :
 
Device/Package xcku040fbva676 6/16/2014 16:23:01


Update:
1/26/2015 - Removed references to FLVA1760 and FLVB1517, which are no longer available.  See (Xilinx Answer 62870) for more information.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
61598 Design Advisory Master Answer Record for Kintex UltraScale FPGA N/A N/A
AR# 61611
Date Created 07/24/2014
Last Updated 01/27/2015
Status Active
Type Design Advisory
Devices
  • Kintex UltraScale
Tools
  • Vivado Design Suite - 2014.2
  • Vivado Design Suite - 2014.1