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AR# 61722

Vivado Sysgen - Generating an IP Catalog compilation target for a model containing both AXI-Stream and AXI4-Lite interfaces results in errors

Description

When trying to generate the IP Catalog compilation target for for a model containing both AXI-Stream and AXI4-Lite interfaces, the following errors are reported by Sysgen.

ERROR: [Coretcl 2-88] No projects are currently open.

ERROR: [IP_Flow 19-2994] Tcl error in init_params procedure. ERROR: [Coretcl 2-88] No projects are currently open.

ERROR: [Coretcl 2-88] No projects are currently open.

ERROR: [IP_Flow 19-2994] Tcl error in init_params procedure. ERROR: [Coretcl 2-88] No projects are currently open.

clos...

For more information please refer to 'F:/ambrosef/s/sg_test/ip_test_both_ss1/vivado.log'

Reported by:
Unspecified


Is this a known issue and how can I generate my IP core with both interfaces?

Solution

This is a known issue and a CR has been filed.

The error seen above is related to the creation of the IPI example design which Sysgen tries to create when packaging an IP core. 

The IP core packaging step has already completed at this point and the IP is fine to use.

The vivado.log file referred to in the error message will confirm that the BD has been written successfully. 

The IP will be found in the output directory from Sysgen in a directory called "IP",

This is the repository which should be used when bringing this IP into the IP Catalog in Vivado.

 

AR# 61722
Date Created 08/07/2014
Last Updated 08/28/2014
Status Active
Type General Article
Tools
  • System Generator for DSP
  • Vivado Design Suite - 2014.2