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AR# 61775

Vivado - Critical warning: [Timing 38-1] DLL output pin(s) used on clock modifying cell clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst without a feedback net: CLKOUT0 CLKOUT1

Description

I am implementing a design which contains a Mixed-Mode Clock Manager (MMCM) generated in IP catalog.

During place_design and route_design, I receive the following critical warning:

[Timing 38-1] DLL output pin(s) used on clock modifying cell clk_gen_i0/clk_core_i0/inst/mmcm_adv_inst without a feedback net: CLKOUT0 CLKOUT1

What is the issue here and how can I correct it?

Solution

The reason for the critical warning is that there is no connection for the feedback net of the MMCM.

When generating an MMCM, the default option for the clocking feedback source is "Automatic Control On-Chip".

However, when you remove the BUF(BUFG/BUFH) of the output clock clk_out1, you need to connect the clocking feedback net by yourself.

MMCM_1.png 

MMCM_2.png



 

AR# 61775
Date Created 08/13/2014
Last Updated 01/19/2015
Status Active
Type General Article
Tools
  • Vivado Design Suite