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AR# 61930

Design Advisory Master Answer Record for Virtex UltraScale FPGA


Design Advisory Answer Records are created for issues that are important to designs currently in progress and are selected to be included in the Xilinx Alert Notification System.

This Design Advisory covers the Virtex UltraScale FPGA and related issues which impact Virtex UltraScale FPGA designs.


Design Advisories Alerted on July 06, 2015

07/06/2015 - (Xilinx Answer 64838) - Design Advisory for UltraScale FPGA Transceivers Wizard: GTH Production Updates in Vivado 2015.2

Design Advisories Alerted on December 01, 2014

12/01/2014 - (Xilinx Answer 62870) - Design Advisory for package changes for Virtex UltraScale devices and Kintex UltraScale devices

Design Advisories Alerted on November 10, 2014

11/10/2014 - (Xilinx Answer 62631) - Design Advisory for Vivado 2014.3 - Program eFUSE Registers operation failure for 7 series and UltraScale FPGAs

Design Advisories Alerted on September 8, 2014

09/08/2014 - (Xilinx Answer 61903) Design Advisory for Virtex UltraScale ASCII Package Files Update

Revision History:

07/06/2015 - Added 64838

11/10/2014- Added 62631

09/08/2014 - Added 61903

Linked Answer Records

Child Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
34904 Xilinx Configuration Solution Center N/A N/A
AR# 61930
Date Created 09/04/2014
Last Updated 07/02/2015
Status Active
Type Design Advisory
  • Virtex UltraScale