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AR# 61942

MIG Ultrascale DDR4/DDR3 - MIG does not provide a GUI option to disable Chip Select (CS). Is there a way to manually disable CS?

Description

MIG currently does not include an option to disable usage of the Chip Select (CS) pin.  

This is desirable in single rank interfaces to save an FPGA pin and tie off the CS pin directly at the memory. 

This support will be added to MIG in Vivado 2014.3.  

Until then, this answer record provides a manual work around.

Solution

1. Generate the MIG design and assign the CS_N pin to an unused pin in the addr/control bank.
 
2. Open the module "rtl/phy/mig_v5_0_ddr_cal_addr_decode.sv" in a text editor.

3. Add the following parameter:

localparam CS_N_TIED_LOW = "TRUE";

Note: When any edits are made to rtl within the MIG IP, Out-Of-Context synthesis (OOC) must be disabled for the MIG instance. 

Otherwise, the rtl edits will be overwritten back to the original format.
AR# 61942
Date Created 09/05/2014
Last Updated 09/16/2014
Status Active
Type General Article
Devices
  • Kintex UltraScale
  • Virtex UltraScale
IP
  • MIG UltraScale