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AR# 62166

14.7 System Generator for DSP - Sysgen crashes when trying to simulate a black box design


When trying to simulate a black box design in ISE Simulator, I run simulation in Simulink, and it crashes with the following error:

"Matlab has encountered an internal problem and needs to close."

What can cause this problem?


This issue only affects ISE Sysgen. 

Vivado Sysgen issues the correct error message.

It occurs in a Verilog Black box design, if a net is assigned to a register.

For example :

reg clk_int;
assign clk_int = (ce_i==1)? clk_i : 0;

Changing the reg type to wire can fix the problem.

AR# 62166
Date 03/23/2015
Status Active
Type General Article
  • System Generator for DSP
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