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AR# 62397

2014.1 Partial Reconfiguration UltraScale: Incorrect DRC error during read_checkpoint -cell on "ERROR: [Drc 23-20] Rule violation (RPBF-1) IO port is missing a buffer"

Description

I have a PR design that loads (link_design) the top-level with a black-box for a module that contains GT blocks.

When the blackbox is resolved with the below read_checkpoint command, a DRC Error is improperly issues for the GT RX and TX pins. 

read_checkpoint -cell inst_exp_pcie3_wrapper ./XX_synth.dcp -strict

ERROR: [Drc 23-20] Rule violation (RPBF-1) IO port is missing a buffer - Device port pci_exp_rxn[0] should be connected to an IO cell such as an [IO]BUF*.
ERROR: [Drc 23-20] Rule violation (RPBF-1) IO port is missing a buffer - Device port pci_exp_rxp[0] should be connected to an IO cell such as an [IO]BUF*.
ERROR: [Drc 23-20] Rule violation (RPBF-1) IO port is missing a buffer - Device port pci_exp_txn[0] should be connected to an IO cell such as an [IO]BUF*.
ERROR: [Drc 23-20] Rule violation (RPBF-1) IO port is missing a buffer - Device port pci_exp_txp[0] should be connected to an IO cell such as an [IO]BUF*.

In UltraScale there are no buffers on these dedicated connections, and this DRC should not be run on these pins. 

Solution

The issue is fixed in the 2014.2 release of Vivado Design Suite.
AR# 62397
Date Created 10/08/2014
Last Updated 02/24/2015
Status Active
Type General Article
Tools
  • Vivado Design Suite - 2014.1