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This answer record serves as the Vivado 2014.3 tool update (2014.3.1) Release Notes and contains links to information regarding what is included in the update.
The Vivado 2014.3 tool update (2014.3.1) fixes the following issues.
(Xilinx Answer 62482) - Synthesis crash occurring on Windows platform when multiple create_clock constraints on
the same clock port (Xilinx Answer 62631) - Program eFUSE Registers operation failure for 7 series and UltraScale FPGAs