Version Found: MIG 7 Series v2.2
When configuring a MIG Controller at 800MHz for a 1.35V component, the following warning is generated in the GUI.
This is preventing core generation:
This worked in older versions of the MIG GUI but appears to be limited now.
The MIG GUI should support the maximum frequency values listed in the FPGA AC & DC Switching Guide Datasheet.
See the "Maximum Physical Interface (PHY) Rate for Memory Interfaces IP available with the Memory Interface Generator" table for the respective device.
As a workaround, modify the PLLE2_ADV settings in the MIG design making sure that the device VCO frequency is met.
11/25/2014 - Initial Release