UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 63035

2014.4 Vivado IPI - Critical Warning: BD 41-759 The input pins (listed below) are either not connected or do not have a source port, and they don't have a tie-off specified

Description

I am receiving the following Critical Warning for my Vivado 2014.4 IPI design that includes a custom IP:

BD 41-759] The input pins (listed below) are either not connected or do not have a source port, and they don't have a tie-off specified.
Please check your design and connect them if needed:
......./S_AXI_AWUSER
......./S_AXI_AWID
......./S_AXI_WID
......./S_AXI_WUSER
......./S_AXI_ARUSER
......./S_AXI_ARID

Solution

This occurs when a Custom IP is connected to another IP.

However the ports from the warning message are not needed, and as a result are not used.

The warning message states that the Ports do not have a tie off value specified.

To specify this value, you can do the following:

Open the Custom IP in IP Packager, by right clicking the IP in IP Catalog > Edit.

Then in IP Packager > Select Ports and Interfaces > Right click the Port from the warning message.

For example, S_AXI_AWID > Edit Port > then add a value to Driver Value
 
Edit_POrt.PNG



This gives it a tie-off value when it is not used.
 
Then Re-package the IP to finish.
 
AR# 63035
Date Created 12/04/2014
Last Updated 02/24/2015
Status Active
Type General Article
Devices
  • Zynq-7000
Tools
  • Vivado Design Suite - 2014.4
IP
  • Interconnect Infrastructure