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AR# 63113

AXI Bridge for PCI Express Gen3 v1.0 (Rev1) - Memory Read may not work in specific conditions

Description

Version Found: 1.0 (Rev1)
Version Resolved and other known issues: (Xilinx Answer 61898)

Memory Reads may not get through the core if the core loses link and goes into LTSSM detect state, before the link comes up again.

Solution

This is a known issue to be fixed in the next release of the core. 

To work around the issue, please install the patch attached with this answer record, as described below.

  •     This patch is for Vivado 2014.4
  •     Unzip the attached zip file to the directory of your choice.
  •     Open Vivado 2014.4 and create a new project.
  •     Open IP catalog. Right click the core you are using and choose IP Settings.
  •     Click Add Repositories and point it to the location where you have unzipped the patch.
  •     Click OK and you are now ready to generate the core.
  •     If you have previously generated the core, you can choose 'Upgrade IP' on your core.
  •     Alternatively, you could use the MYVIVADO environment variable and point this to the location of the patch.

Note: "Version Found" refers to the version the problem was first discovered. 

The problem may also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History:
01/07/2015 - Initial Release



Attachments

Associated Attachments

Name File Size File Type
vivado-patch-AR63113.zip 1 MB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
61898 AXI Bridge for PCI Express Gen3 - Release Notes and Known Issues for Vivado 2014.3 and newer tool versions N/A N/A
AR# 63113
Date Created 12/12/2014
Last Updated 01/08/2015
Status Active
Type Known Issues
Tools
  • Vivado Design Suite - 2014.4
IP
  • AXI PCIe Gen3