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AR# 63121

Vivado - Are hierarchical EDIF files supported in Vivado?

Description

Are hierarchical EDIF (nested EDIF) files supported in Vivado?
 
I have a design that contains multiple EDIF (.edn) source files instantiated in other EDIF sources. 

The lower level EDIF files are not displayed in the Hierarchy Source View correctly under the parent EDIF and are treated as black box modules in Synthesis and Implementation.

Solution

Hierarchical EDIF designs can be synthesized and implemented in Vivado. 

However, t
he Hierarchical Source View (HSV) does not parse into EDIF/DCP files for hierarchy.

This is by design for improved performance.

Setting the project to manual compile order mode should work. 

Below are items that you should be aware of when using designs with nested EDIF files.

  • HSV code does not parse EDIF files to determine hierarchy. 
  • Vivado will pass EDIF files to synthesis if they are leaf nodes of the HDL hierarchy, but does not dive into an EDIF to determine if it has other dependencies. 
  • Because HSV does not parse the EDIF files, it will not see that nested EDIF files are part of the active hierarchy and therefore will not show them under the parent EDIF file and does not pass them to Synthesis. 
  • If the project is changed to manual compile order, the files will be passed to synthesis.  Synthesis should work and not create black boxes for these EDIF modules.
  • The EDIF files must be added to the project, Vivado will not search directories to find an EDIF file of a given name (Note: This is different than ISE behavior with the -sd option)
  • If there are no Top-Level HDL files in the design, a "Post-Synthesis" project type should be used when creating the Vivado project.

Linked Answer Records

Associated Answer Records

AR# 63121
Date Created 12/14/2014
Last Updated 03/06/2015
Status Active
Type General Article
Devices
  • FPGA Device Families
Tools
  • Vivado Design Suite