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AR# 63182

7 Series Integrated Block for PCI Express / AXI Memory Mapped to PCI Express (Vivado 2015.1/Vivado 2015.2) - Link can intermittently fail to train on Artix-7 and Zynq devices

Description

Version Found:

  • v3.1 (7 Series Integrated Block for PCI Express)
  • v2.6 (Rev1) (AXI Memory Mapped to PCI Express)

Version Resolved and other Known Issues

See (Xilinx Answer 54643) for 7 Series Integrated Block for PCI Express and (Xilinx Answer 54646) for AXI Memory Mapped to PCI Express.

A link training issue has been seen with the 7 Series Integrated Block for PCI Express and AXI Memory Mapped to PCI Express cores on Artix-7 and Zynq devices that use GTP, where the link can intermittently fail to train.

Solution

To fix the issue in Vivado 2015.1, please update the gtp_pipe_drp.v file as follows:

//-------------- DRP Done -------------
FSM_DONE:
begin
if (index == INDEX_MAX)
begin
fsm <= FSM_IDLE;
index <= 5'd0;
done <= 1'd1; //changed to 1'd1 from 1'd0
end

always @ (posedge DRP_CLK)
begin
if (!DRP_RST_N)
begin
fsm <= FSM_IDLE;
index <= 5'd0;
done <= 1'd1; // changed to 1'd1 from 1'd0
end

//--------- Default Sate -------------------
default:
begin
fsm <= FSM_IDLE;
index <= 5'd0;
done <= 1'd1; // changed to 1'd1 from 1'd0
end

This issue has been fixed for the 7 Series Integrated Block for PCI Express core in Vivado 2015.2.

For the AXI Memory Mapped to PCI Express core in Vivado 2015.2, please install the patch attached to this answer record as described below.

This issue will be fixed in the next release of the core for AXI Memory Mapped to PCI Express.

  • The provided patch is for Vivado 2015.2 for the AXI Memory Mapped to PCI Express core.
  • Unzip the attached zip file to the directory of your choice.
  • Open Vivado 2015.2 and create a new project.
  • Open IP catalog. Right click the core you are using and choose IP Settings.
  • Click Add Repositories and point it to the location where you have unzipped the patch.
  • Click OK and you are now ready to generate the core.
  • If you have previously generated the core, you can choose 'Upgrade IP' on your core.
  • Alternatively, you can use the MYVIVADO environment variable and point this to the location of the patch.
After the patch is installed, the version of the AXI Memory Mapped to PCI Express core should indicate: v2.6 (Rev. 2).

Note: "Version Found" refers to the version where the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History:

06/17/2015 - Initial Release

07/21/2015 - Added patch for AXI Memory Mapped to PCI Express core.

Attachments

Associated Attachments

Name File Size File Type
AR63182_Vivado_2015_2_preliminary_rev1.zip 1 MB ZIP

Linked Answer Records

Master Answer Records

AR# 63182
Date Created 12/17/2014
Last Updated 08/26/2015
Status Active
Type Known Issues
IP
  • 7 Series Integrated Block for PCI Express (PCIe)
  • AXI PCI Express (PCIe)