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AR# 63223

MIG Spartan 6 MCB - 3.92 - Allows higher densities for CSG325 than mentioned in UG388


Spartan-6 FPGA Memory Controller User Guide (UG388) Page 13 Note 1 states:

"For devices in the CSG225 package, the MCBs support only the x4 and x8 memory interface width options, meaning LPDDR devices cannot be supported.

In addition, there are only 13 MCB address bits available in this package, which limits the maximum memory 
density to 256 Mb for DDR2 and 512 Mb for DDR and DDR3". 

However, MIG allows for the same part to select 1G and 2G for DDR and DDR3.

Is the max memory restriction due to internal logic in MCB IP, and not from the interface?




With the custom part you will be able to generate the core for 1G and 2G memory parts and the example design is implemented without any errors.

As a result you can safely select greater than 512Mb memory parts.

Revision History:
01/20/2015 - Initial Release

AR# 63223
Date Created 12/25/2014
Last Updated 03/05/2015
Status Active
Type General Article
  • Spartan-6 LX
  • ISE
  • MIG Virtex-6 and Spartan-6