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AR# 6326

** OBSOLETE ** 2.1i UNISIMS: GSR/GTS behavior does not simulate with RAMB4* Verilog models.


Keywords: GSR, GTS, BlockRam, Verilog, Unisim, Virtex

Urgency: Standard

General Description:
GSR/GTS behavior does not simulate with the RAMB4* UNISIM
Verilog models.


The UNISIM Verilog models for RAMB4* does not assign glbl.GSR and
glbl.GTS to GSR and GTS, respectively. The behavioral models are
using the GSR_SIGNAL methodology.

To resolve this issue, the user can apply both methodologies for
initializing GSR/GTS.

Please see (Xilinx Solution 6537) regarding the usage of the glbl module
in the Xilinx Alliance 2.1 (or greater) software.

Please see (Xilinx Solution 3914) on the usage of the GSR_SIGNAL
text macro.

Please see (Xilinx Solution 5009) on how to drive the GSR pin.
AR# 6326
Date Created 08/31/2007
Last Updated 08/28/2002
Status Archive