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AR# 63297

2014.3/2014.4 Vivado Sysgen - Tactical Patch for errors "All Xilinx Blocks must be contained in a level of hierarchy with a System Generator Token." caused by DocBlock issue


My design works correctly in Vivado Design Suite 2014.2. 

After I upgrade it to Vivado 2014.3/2014.4, I receive numerous errors like the following in Simulink Simulation:

All Xilinx Blocks must be contained in a level of hierarchy with a System Generator Token.

Sometime there is only one internal error related to a constant. 

When I re-run it, it repeatedly generates the above error again.

The issue only occurs when the design reaches a certain level of complexity. 

A smaller design works fine.

What can cause this problem?


This is a known issue related to how Sysgen works with DocBlock in 2014.3 and 2014.4. 

It will be fixed in a future release of Vivado Sysgen.

For Vivado 2014.3/2014.4, follow the instructions below to install attached patch:

  1. Unzip the patch file.
  2. Replace the xlGather_phase2.p located at : $VIVADO/scripts/sysgen/matlab
  3. Relaunch Sysgen, the issue should be fixed.

For other Vivado Sysgen Known issue, please refer to (Xilinx Answer 62168)



Associated Attachments

Name File Size File Type
xlGather_phase2.zip 3 KB ZIP

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
62168 Vivado DSP Tools (System Generator for DSP) (2014.3) - Release Notes and Known Issues N/A N/A
AR# 63297
Date Created 01/14/2015
Last Updated 02/19/2015
Status Active
Type General Article
  • System Generator for DSP