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AR# 63338

Aurora 8B10B v10.3/Aurora 64B66B v9.3 - When core is generated with DRP_MODE as "Disabled" in IPI, is resulting in floating DRP input ports at _core level


When Aurora 64b66b is generated with DRP_MODE set to "Disabled" in the IPI design and a top level wrapper is created, The DRP input ports at the _Wrapper level are left unconnected in the <component_name>_core.v file.

This will result in compile errors during synthesis stage.


This is a known issue with Aurora 8B10B v10.3/Aurora 64B66B v9.3 cores in IPI use mode only.

This issue is fixed in the 2015.1 release.

As a work-around, the <component_name>_core.v file needs to be updated.

The DRP input ports connected in the wrapper instance need to be connected to GND.

Revision History:

01/28/2015 - Initial Release

AR# 63338
Date 02/13/2015
Status Active
Type General Article
  • Artix-7
  • Kintex-7
  • Virtex-7
  • More
  • Kintex UltraScale
  • Virtex UltraScale
  • Less
  • Aurora 64B/66B
  • Aurora 8B/10B
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