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AR# 63628

Does Vivado Simulator support tracing of VHDL variables?


ISIM does not support tracing of VHDL variables.

Is this feature available in Vivado?


This feature is not yet supported. 

To confirm this behavior, you can run simulation for the attached test case by following the steps below:

xelab -vhdl my.vhd -debug all -s test
xsim test
add_wave -r /*

Vivado returns the following warning that VHDL variable tracing is not supported.

WARNING: Simulation object /test/line__51/vvv was not traceable in the design for the following reason:
Vivado Simulator does not yet support tracing of VHDL variables.


Associated Attachments

Name File Size File Type
my.vhd 1 KB VHD

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
58880 Xilinx Simulation Solution Center - Design Assistant - Vivado Simulator - Waveform Database (.wcfg,.wdb etc). N/A N/A
AR# 63628
Date Created 02/18/2015
Last Updated 04/08/2015
Status Active
Type General Article
  • Vivado Design Suite