Version Found: DDR4 v7.0
Version Resolved: See (Xilinx Answer 69035)
I am simulating a MIG UltraScale DDR4 design targeted for tCK=833ps, with speed bin=833, and using a Micron memory model.
I am receiving the following error message:
This violation occurs because of an issue with the Micron memory model using the wrong speed bin parameters.
Please use the most up to date memory model from Micron to resolve the issue.
04/01/2015 - Initial Release