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AR# 63814

Vivado Partial Reconfiguration - In device view, a net in reconfigurable module is seen to be routed in the static region

Description

In my partial reconfiguration design, the CONTAIN_ROUTING property is set on the pblock of a Reconfigurable Partition (RP) by default, so the net in the reconfigurable module should not be routed in the static region.

However, I find a net between registers in reconfigurable module is routed in the static region.

63814-1.png







63814-2.png




Is this correct behavior?

Note: The floorplan is jumping over the other logic resource for experimental purposes, this is not recommended.

Solution

Then net does not hit any INT (Interconnect) tiles in the static region and just passes through on the LH (Long Horizontal route) resource, so there are no static programmable bits used and this is legal. 

63814-3.png







AR# 63814
Date Created 03/05/2015
Last Updated 03/09/2015
Status Active
Type General Article
Devices
  • Kintex-7
  • Artix-7
  • Virtex-7
  • Zynq-7000
Tools
  • Vivado Design Suite