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AR# 63921

How to force the value of a signal, wire, or reg to a certain value during simulation using Tcl commands?

Description

How can I force the value of a signal, wire, or reg to a certain value during simulation using Tcl commands?

Solution

The add_force Tcl command is used to force values during simulation.

Command syntax:
 

add_force [-radix <arg>] [-repeat_every <arg>] [-cancel_after <arg>] [-quiet] [-verbose] <hdl_object> <values>..

 
Examples:
 
The following example forces the reset signal high at 300 nanoseconds, using the default radix, and captures the name of the returned force object in a Tcl variable which can be used to later remove the force:
 

set for10 [ add_force reset 1 300 ]

 
The following example shows the use of <{value time}> pairs, repeated periodically, and canceled after a specified time:
 

add_force mySig {0} {1 50 } {0 100} {1 150 } -repeat_every 200 -cancel_after 10000

 

Note: In the preceding example, the first <{value time}> pair does not include a time.

This indicates that the specified value, 0, is applied at time 0 (the current_time)
 
Use the "add_force -help" Tcl command for more information on usage of this command.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
58885 Xilinx Simulation Solution Center - Design Assistant - TCL Simulation Commands N/A N/A
AR# 63921
Date Created 03/15/2015
Last Updated 04/13/2015
Status Active
Type General Article
Tools
  • Vivado Design Suite