I am using the FIFO Generator, and receive the following Critical Warning during implementation, and when I open a Synthesized design.
This occurs in the example design as well.
What can cause this problem and how can I avoid it?
This is a known issue in FIFO Generator.
The Critical Warning is caused by the following constraints:
The constraints expect clocks signals in the get_clocks command.
You will need to create clocks for them before you use get_clocks.
After this, you can double check whether they are considered clock signals by using following command:
Then reset all of the runs and the issue will be solved.