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AR# 64200

2015.1 - SDK New Features - XSCT (Xilinx Software Command-Line Tool) introduction and tutorial


SDK 2015.1 introduces XSCT (Xilinx Software Command-Line Tool) which allows the user access to the full set of SDK tools from the command line.

This allows the user to create complete SDK workspaces using SDK Batch mode, investigate the hardware and software using HSI, and debug and run on hardware using XSDB, all from the command line using XSCT.

This Answer Record includes a simple tutorial for 7 Series.

The purpose is to answer any immediate questions on this tool.

For more information, users should seek SDK Help, or Xilinx.com


The list of supported SDK Batch mode commands can be seen below:

  • sdk set_workspace
  • sdk get_workspace
  • sdk set_user_repo_path
  • sdk get_user_repo_path
  • sdk get_app_templates
  • sdk create_hw_project
  • sdk create_bsp_project
  • sdk create_app_project
  • sdk build_project
  • sdk clean_project
  • sdk import_projects
  • sdk import_sources

The list of supported XSDB commands can be seen below:

  • connections - Target Connection Management
    • connect
    • disconnect
    • targets
  • registers - Target Registers
    • rrd
    • rwr
  • running - Program Execution
    • con
    • stop
    • state
    • stp
    • stpi
    • nxt
    • nxti
    • stpout
    • dis
  • memory - Target Memory
    • mrd
    • mwr
  • download - Target Download FPGA/Binary
    • dow
    • fpga
  • reset - Target Reset
    • rst
  • breakpoints -Target Breakpoints/Watchpoints
    • bpadd
    • bpremove
    • bpenable
    • bpdisable
    • bplist
  • stream - JTAG UART
    • jtagterminal
    • readjtaguart
    • jtag - JTAG Access
    • jtag targets
    • jtag sequence
    • jtag device_properties
    • jtag lock
    • jtag unlock
    • jtag unlock
    • jtag claim
    • jtag disclaim
    • jtag frequency
    • jtag servers

XSCT will also run HSI commands. 

HSI commands do not consider workspace (meaning projects created in HSI cannot be opened in the SDK tool).

For usage details, refer to (UG1138) Generating Basic Platforms Reference Guide


Note: For more information on each of these commands, see the SDK Help. 

Alternatively, you can use the XSCT command line:

xsct% help <topic>

7 Series demo

Here, a simple MicroBlaze system with a UART was created in Vivado IP Integrator, and Exported to SDK.

For this demo, the SDK Batch mode will be used to create the SDK Workspace. 

The HSI will be used to determine the processor used.

finally, the XSDB will be used to program the device, and run the application.


The example MicroBlaze can be seen below: 



Because the device will be programmed, the bitstream is required. 

In Vivado, Generate Bitstream then export to SDK (include the bitstream)

The resulting HDF file is used as an input file for XSCT.

Note: The HDF is a container file that contains all the files needed in XSCT.


The script below is meant as a reference, and a typical use case for XSCT. 

There are 4 procs:

  • main
    • This is the main proc that runs all the other procs
  • create_workspace
    • This uses the SDK Batch mode to create the workspace
  • get_processor
    • This uses HSI to get the processor
  •  program_hw
    • This uses XSDB to program the FPGA, and download and run the application created in create_workspace

The procs are broken up into separate procs for demonstration purposes only. 

When executed the script will do the following:

  • Create SDK workspace
    • Create the hardware platform from the HDF file supplied
    • Create a BSP using the Hardware Platform, and use a HSI command to find the processor
    • Create the Hello World Application
  • Program the FPFA using the XSDB
    • Download the Hello World ELF
    • Execute the ELF


proc main {hdf workspace_name} {
    puts "Creating Workspace"
    create_workspace $hdf $workspace_name
    puts "Testing on Hardware"
    program_hw ${workspace_name}/hw_0/mb_sys_wrapper.bit ${workspace_name}/app_0/Debug/app_0.elf

proc create_workspace {hdf workspace_name} {
    sdk set_workspace $workspace_name
    sdk create_hw_project -name hw_0 -hwspec $hdf
    set proc [get_processor ${workspace_name}/hw_0/system.hdf]
    sdk create_bsp_project -name bsp_0 -proc $proc -hwproject hw_0 -os standalone
    sdk create_app_project -name app_0 -proc $proc -hwproject hw_0 -bsp bsp_0 -app {Hello World}
    sdk build_project -type all
proc get_processor {hdf} {
    hsi open_hw_design $hdf
    return [hsi get_cells -filter {IP_TYPE==PROCESSOR}] 

proc program_hw {bit elf} {
    targets 1
    fpga $bit
    targets 3
    dow $elf


For Zynq project creation, the flow is the same as the above example.

However, the FSBL app requires the xilffs and xilrsa libraries in the BSP, and BSP generation will not have these by default. 

To work around this, you just need to create the Zynq FSBL app as this will generate the BSP automatically. 

For example:

proc create_workspace {hdf workspace_name} {
   sdk set_workspace $workspace_name
   sdk create_hw_project -name hw_0 -hwspec $hdf
   sdk create_app_project -name fsbl -app {Zynq FSBL} -proc ps7_cortexa9_0 -hwproject hw_0 -os standalone
   sdk build_project -type all

To build devicetree in from the command line, you can use the template below:

proc dts_test {hdf workspace} {
    sdk set_workspace $workspace
    sdk set_user_repo_path ./repo
    sdk create_hw_project -name hw_0 -hwspec $hdf
    sdk create_bsp_project -name bsp_0 -hwproject hw_0 -proc ps7_cortexa9_0 -os device-tree
    sdk build_project -type bsp -name bsp_0

Note: The repo structure looks like the following:


XSCT Limitations:

  1. HSI and SDK are two different processes and SDK will not consume changes done in HSI BSP settings in 2015.1. 
  2. During sdk build_project there is no complete build log generated.
  3. Cannot add or modify Libraries/Drivers in SDK batch
  4. Cannot change any compiler/linker setting in SDK batch
  5. XSCT only supports Tcl files as input

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
64215 2015.1 - New Features SDK N/A N/A
AR# 64200
Date Created 04/09/2015
Last Updated 05/13/2015
Status Active
Type General Article
  • Vivado Design Suite - 2015.1