We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 64226

SelectIO - Kintex UltraScale and Virtex UltraScale HSLVDCI_15 and HSLVDCI_18 standards have a Bank voltage requirement that is not checked in Vivado versions up to and including 2015.1


There is a gap in the SelectIO Users Guide (V1.2) and Vivado releases including and up to 2015.1 when using HSLVDCI_15 or HSLVDCI_18.

Input and Bidirectional Pins that leverage either of these standards have a bank voltage requirement that is not documented or checked by the software DRC.


Although it is not a common use case, designs that leverage HSLVDCI_15 or HSLVDCI_18 can only be used in banks with a bank voltage of 1.5V (for HSLVDCI15) or 1.8V (for HSLVDCI18)

The SelectIO User Guide prior to version 1.5 does not reflect this restriction.
AR# 64226
Date Created 04/10/2015
Last Updated 05/15/2015
Status Active
Type General Article
  • Virtex UltraScale
  • Kintex UltraScale