Direct connections of this type are not recommended.
If a path that goes from one RP to another RP does not have a synchronous timing endpoint between the two RPs, timing closure issues can arise as modules are swapped out.
With no way to time to partition pins, there is no way to guarantee that all combinations of paths between two synchronous endpoints within two different RPs will meet timing when RMs are exchanged.
DRC HDPR-34 will be reported when the above connection is detected:
HDPR-34 Critical Warning
Direct paths between two RPs
Signal 'XX' is a direct path that connects Reconfigurable Partition 'inst_1' and 'inst_2' without a synchronous timing point in the static design.
This omission may lead to timing failures in hardware depending on the Reconfigurable Modules that are currently loaded.
To close timing on all possible synchronous paths, ensure that any possible path contains at most a segment in only a single Reconfigurable Partition.
Related violations: <none>
If the PR design's combination is very simple, and you can confirm that all of the direct paths in all of the RP combinations can pass the timing check, you can use this type of direct path between two RPs.