UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 6433

EXEMPLAR - The synthesis process is removing my instantiated Xilinx component (Optimize).

Description

Keywords: optimize, component, removed, optimized out, instance

Urgency: Standard

General Description:
I have instantiated a specific Xilinx component (i.e., BUFG, BUFGDLL), but after the Optimize command in synthesis is run, my instantiated component disappeares. Did I instantiate incorrectly? Is there an attribute I should use when instantiating Xilinx-specific components?

Solution

1

Anytime a Xilinx-specific component is instantiated, that component should never be removed by synthesis. If an instantiated component is being removed or optimized to a different component, this happens because of a bug in the Synthesis tool.

The following attribute can be used to force Optimize not to touch a particular instance:

After performing a "Read", but before using the "Optimize" command, either use the following in the TCL script, or type it in the GUI command window:

set_attribute -instance instance_name -name NOOPT -value TRUE

For example, if a BUFG is being removed in the instance "U1", you would use the following:

set_attribute -instance U1 -name NOOPT -value TRUE

2

VHDL Syntax:

attribute noopt : boolean;
attribute noopt of <component_name> : <type> is TRUE;

For example, if a BUFG is being removed in the instance "U1", you would use the following:

attribute noopt : boolean;
attribute noopt of U1 : label is TRUE;

3

Verilog Syntax:

//exemplar attribute <module_name> noopt TRUE

For example, if a BUFG is being removed in the instance "U1", you would use the following:

//exemplar attribute U1 noopt TRUE
AR# 6433
Date Created 05/10/1999
Last Updated 04/24/2007
Status Archive
Type General Article