Description

When trying to generate a hardware Cosimulation Target from my Sysgen MDL, I receive the following error and the target generation does not complete:

--------------------------------- Version Log ----------------------------------
Version Path
System Generator 2014.4 /proj/xbuilds/2014.4.1_daily_latest/installs/lin64/Vivado/2014.4.1
Matlab 8.3.0.532 (R2014a) /tools/gensys/matlab/R2014a
Vivado 2014.4 /proj/xbuilds/2014.4.1_daily_latest/installs/lin64/Vivado/2014.4.1
--------------------------------------------------------------------------------
Summary of Errors:
Error 0001: ERROR: [Synth 8-439] module 'blk_mem_gen_0' not found [/h...
Block: Unspecified
--------------------------------------------------------------------------------

Error 0001:

Reported by:
Unspecified

Details:
ERROR: [Synth 8-439] module 'blk_mem_gen_0' not found [/<path_to_project>.srcs/sources_1/ipshared/xilinx.com/packet_processor_v1_0/6cdaea3d/hdl/packet_processor_v1_0_en.v:202]
ERROR: [Synth 8-285] failed synthesizing module
'packet_processor_v1_0'

Is this a known issue?

Solution

This is a known issue in Vivado 2014.4.

The issue has been resolved in the 2015.1 release and customers should upgrade to Vivado 2015.1 if they encounter this issue.

If it is not possible to upgrade to Vivado 2015.1, a patch is available for this issue and is attached to this AR.

To install the patch, unzip the contents of the patch file directly into your Vivado installation directory.
 

For example: C:\Xilinx\Vivado\2014.4

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