UPGRADE YOUR BROWSER
We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
In my partial reconfiguration design, the RESET_AFTER_RECONFIG property is properly set on the reconfigurable partition's pblock.
After downloading the encrypted partial bit files, a register in the Reconfigurable Module (RM) which was written a non-zero value before is not reset properly.
This issue is fixed in Vivado 2015.2.
In Vivado versions prior to 2015.2, you have to use the partial bit file without encryption or reset the registers in the RM manually.
AR# 64539 | |
---|---|
Date | 05/26/2015 |
Status | Archive |
Type | General Article |
Tools |
|