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AR# 64642

MIG UltraScale RLDRAM3 - IP upgrade in 2015.1 creates DDR4 controller


Version Found: MIG UltraScale v7.0
Version Resolved: See (Xilinx Answer 58435)

When migrating a MIG UltraScale RLDRAM3 IP to 2015.1, a DDR4 controller can mistakenly be created instead of RLDRAM3.

This only occurs when the "sys_rst" port is not assigned to an I/O site in the original MIG UltraScale RLDRAM3 IP. 


If this issue occurs you must regenerate a new MIG UltraScale RLDRAM3 IP in Vivado 2015.1 to ensure that the proper interface type and the rest of the IP parameters are generated properly.

See (Xilinx Answer 63831) for guidance on Migrating and Upgrading IP into 2015.1.

Revision History:
05/21/2015 - Initial Release

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
58435 DDR4, DDR3, QDRIV, QDRII+, RLDRAM3, LPDDR3 UltraScale and UltraScale+ - IP Release Notes and Known Issues N/A N/A

Child Answer Records

Answer Number Answer Title Version Found Version Resolved
63831 MIG UltraScale - Migrating and Upgrading IP into 2015.1 N/A N/A
AR# 64642
Date 05/27/2015
Status Active
Type Known Issues
  • Kintex UltraScale
  • Virtex UltraScale
  • MIG UltraScale
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