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AR# 64814

SRIO Gen2 v3.2: IP core Update for A7 GTP


The SRIO Gen2 IP core requires some updates for A7 GTP.

Vivado versions: 2014.3 to 2015.2
SRIO core versions: srio_gen2_v3_2, srio_gen2_v3_3 (all revisions) and core version released in Vivado 2015.2

  • SRIO GT wrappers for A7 devices are missing the soft reset connection.
  • CPLLPD updates are not present in the GT common files. (See (Xilinx Answer 59294))


The encrypted files attached to this answer record are applicable for current A7 devices.

Please follow the steps below:

  1. Replace the a7_gtpe2_common_v.ttcl file in the following Vivado IP directory with the file attached to this AR:


  2. Replace the  srio_gt_a7_v.ttcl in the following Vivado IP directory with the file attached to this AR:

  3. Open Vivado and create a simple design targeting A7 devices, and targeting the srio_gen2 core.
  4. Once the core configuration is complete, create an example design.
  5. In the example design window, open srio_gt_wrapper_<instance_name>_<width>.v and check that the soft_reset_in_sync signal is connected to the soft_reset_in signal in the <instance_name>_init instance.
  6. Open the Vivado project example design IP Sources <component_name>_a7_gtpe2_common.v file and check for a PLL0RESET connection.

    It should be connected to pll0_reset_i.


Associated Attachments

Name File Size File Type
a7_gtpe2_common_v.ttcl 1 KB TTCL
srio_gt_a7_v.ttcl 5 KB TTCL

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
54648 LogiCORE IP Serial RapidIO Gen2 Core - Release Notes and Known Issues for Vivado 2013.1 and newer tools N/A N/A
AR# 64814
Date Created 06/17/2015
Last Updated 10/01/2015
Status Active
Type Known Issues
  • Serial RapidIO