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AR# 64953

2015.2 Vivado Simulator - When simulating the AXI BFM, the following errors are received in compilation - ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode

Description

I am receiving the following errors when simulating the AXI BFM model in Vivado Simulator:

INFO: [VRFC 10-2263] Analyzing Verilog file "path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v" into library xil_defaultlib
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:130]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:149]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:169]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:189]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:207]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:226]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:248]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:275]
ERROR: [VRFC 10-1342] root scope declaration is not allowed in verilog 95/2K mode [path_to_project/axi_master_example_v1_0/34c559c4/VHDL_sources/testbench_sources/axi_bfm_defines.v:302]

Why do I get these errors and how can I avoid them?

Solution

In this example, the following files all contain APIs which are failing compilation at the line numbers reported.

// Add required BFM define files
`include "zynq_bfm_defines.v"
`include "axi_bfm_defines.v"
`include "axi_bfm_s_defines.v"

Modifying the files in question to comment out these APIs allows the design to complete simulation.

See the attached example files where the following edits are required.

Note: These are the only files changed:

  • "zynq_bfm_defines.v" comment out lines 53 - 185
  • "axi_bfm_defines.v" comment out lines 115 - 318
  • "axi_bfm_s_defines.v" comment out lines 14 275

Attachments

Associated Attachments

Name File Size File Type
zynq_bfm_defines.v 7 KB V
axi_bfm_defines.v 12 KB V
axi_bfm_s_defines.v 11 KB V
AR# 64953
Date Created 07/10/2015
Last Updated 07/13/2015
Status Active
Type General Article
Tools
  • Vivado Design Suite