UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 65081

2015.2 - IBERT - 7 Series example design creates without IBUFDS

Description

When using the IBERT 7 Series GTX IP and generating an example design, write_bitstream fails with the following error:

[DRC 23-20] Rule violation (REQP-123) connects_CLKINSEL_VCC_connects_CLKIN1_ACTIVE - u_ibert_core/inst/SYSCLK_DIVIDER.U_GT_MMCM: The MMCME2_ADV with CLKINSEL tied high requires the CLKIN1 pin to be active.

How can I avoid this?

Solution

This issue will be fixed for the 2015.3 version of the IBERT core.

As a work-around, an IBUFDS can be manually instantiated.

AR# 65081
Date Created 07/28/2015
Last Updated 07/31/2015
Status Active
Type General Article
IP
  • IBERT for 7 Series GTX Transceivers