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AR# 65500

Virtex-7 FPGA Gen3 Integrated Block for PCI Express/AXI Bridge for PCI Express Gen3 (Vivado 2015.3) - Example Design Simulation with VCS Simulator Fails

Description

Version Found

  • v2.0 (AXI Bridge for PCI Express Gen3)
  • v4.1 (Virtex-7 FPGA Gen3 Integrated Block for PCI Express)

Version Resolved and other Known Issues

See (Xilinx Answer 61898) for AXI Bridge for PCI Express Gen3
See (Xilinx Answer 54645) for Virtex-7 FPGA Gen3 Integrated Block for PCI Express

When simulating Virtex-7 FPGA Gen3 Integrated Block for PCI Express or AXI Bridge for PCI Express Gen3 example designs with VCS simulator in Vivado 2015.3, the simulator fails with a crash.

Solution

This is a known issue to be fixed in a future release of the core.

To work around the issue, please follow the steps listed below.

The instructions listed are for a Virtex-7 FPGA Gen3 Integrated Block for PCI Express core.

They also apply to AXI Bridge for PCI Express Gen3 cores.

  • Create the Vivado project
  • Select the VC709 board.
  • Select PCIe gen3 Core, Virtex-7 FPGA GEN3 integrated Block for PCIe.
  • Open the example design.
  • In simulation settings, change the target simulator to VCS simulator.
  • Select GENERATE SCRIPT ONLY.
  • Go to the directory <project/ pcie3_7x_0_example/pcie3_7x_0_example.sim/sim_1/behav>.
  • Open elaborate.sh and Change the VCS command line args DEBUG_PP to DEBUG or DEBUG_ALL.
  • Run compile.sh by using command ./compile.sh
  • Run elaboration.sh by using command ./elaborate.sh
  • Change simulation run time to 1ms from 1000ns in the board_simulate.do file present under the behav directory.
  • Run simulation.sh by using command ./simulation.sh

Note: "Version Found" refers to the version where the problem was first discovered.

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History:

10/08/2015 - Initial Release


AR# 65500
Date Created 09/24/2015
Last Updated 10/07/2015
Status Active
Type Known Issues
IP
  • AXI PCIe Gen3
  • Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)