How much of a simulation or performance run-time gain can be achieved by using a coarser resolution which is higher than 1ps?
There is little or no simulation speed gained by using a simulator resolution coarser than 1 ps.
Vivado simulator along with most of the third party simulators are event driven simulators.
In event driven simulators, most of the simulation time is spent in delta cycles which happen in zero physical time.
Because delta cycles are not affected by simulator resolution, no significant simulation performance gain can be obtained by using a coarser resolution.
Xilinx recommends using '1ps' resolution as it ensures proper simulation of Xilinx primitives without any rounding/truncation of delay values in the simulation models.
Note: If your design has many DSP48E, MMCMs, or GTs, using UNIFAST simulation models might help reduce your simulation time. Please refer to (Xilinx Answer 64061) for more information on UNIFAST usage.