UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 65716

2015.3 - QuestaSim/ModelSim: Error “(): Cannot fine `include file “” in directories: “list of directories”

Description

In Vivado 2015.3, the auto-generated compile script for ModelSim/Questa has double quotes added for +incdir+ arguments. 

This does not occur in Vivado 2015.2.

For example:

2015.3

vlog -64 -incr -sv -work xil_defaultlib  \
+incdir+"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/map" \
+incdir+"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/ip_top" \
+incdir+"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/cal" \
"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/phy/ddr4_phy_v1_0_xiphy_behav.sv"

2015.2

vlog -64 -incr -sv -work xil_defaultlib  \
+incdir+./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/phy \
+incdir+./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/map \
+incdir+./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/ip_top \
"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/controller/mig_ddrx_phy_v1_2_ddr_mc_write.sv" 

If I launch ModelSim/Questa simulation from the 2015.3 Vivado GUI in Windows, I get this error.

# ** Error: ./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/phy/ddr4sdram_phy_ddr4.sv(731): Cannot find `include file "ddr4sdram_phy_iobMapDDR4.vh" in directories: # "./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/map", "./../../.

However, the same 2015.3 flow in Linux works fine, and the same 2015.2 flow works in both platforms.

Why does the double quotes with +incdir+ fail to work for ModelSim/Questa in Windows?

Solution

In Vivado 2015.2, the include directory was not wrapped in double quotes and it would fail when the directory contained a space.

This is why the quotes were added in the 2015.3 release.


Double quotes with +incdir+ work correctly for ModelSim/Questa, but it depends on how it has been invoked:

  • In Linux, we directly call the .do file:
    ExecStep source ./sim_tb_top_compile.do 2>&1 | tee -a compile.log
    Here double quotes with +incdir+ are being invoked on the terminal and work fine.

  • In Window, the do file is passed to a vsim command:
    call %bin_path%/vsim -c -do "do {sim_tb_top_compile.do}" -l compile.log
    Here commands are getting invoked within the vsim prompt and in this case double quotes with +incdir+ do not work.

To fix the issue when the commands are invoked within the vsim prompt, please follow the steps below:

  1. Within the Vivado GUI, go to Tools > Xilinx Tcl Store and click on the Refresh button
  2. After the refresh, click on the Update button for the ModelSim and Questa app
  3. Relaunch behavioral simulation

Alternatively, you can manually edit the script to also wrap +incdir+ in double quotes.

Change the script from the following:

vlog -64 -incr -sv -work xil_defaultlib \
+incdir+"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/map" \
+incdir+"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/ip_top" \
+incdir+"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/cal" \
"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/phy/ddr4_phy_v1_0_xiphy_behav.sv"

Change the script to the following:

vlog -64 -incr -sv -work xil_defaultlib \
"+incdir+./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/map" \
"+incdir+./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/ip_top" \
"+incdir+./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/rtl/cal" \
"./../../../ddr4_test.srcs/sources_1/ip/ddr4sdram/ip_0/rtl/phy/ddr4_phy_v1_0_xiphy_behav.sv"

This issue will be fixed in Vivado 2015.4, in which you do not have to refresh the Tcl Store catalog.
AR# 65716
Date Created 10/15/2015
Last Updated 11/10/2015
Status Active
Type Known Issues
Tools
  • Vivado Design Suite - 2015.3