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AR# 65741

IP MIPI CSI-2 Receiver Subsystem v1.0 - Why do I see an a [Designutils 20-1280] when opening a design in Vivado's elaboration mode?


Why do I see a [Designutils 20-1280] message when opening a design in the Vivado elaboration mode?

[Designutils 20-1280] Could not find module 'bd_0_mipi_csi2_rx_ctrl_0_0_pkt_fifo'. The XDC ...


This error can be safely ignored. It is a false alarm and has no impact on core functionality.

The error occurs when Vivado fails to detect the XDC of the sub-core used in the MIPI CSI-2 Receiver Subsystem.

The MIPI CSI-2 Receiver Subsystem can be synthesized and implemented as normal.

AR# 65741
Date 10/28/2015
Status Active
Type General Article
  • Zynq UltraScale+ MPSoC
  • Kintex UltraScale+
  • Virtex UltraScale+
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