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AR# 65971

2015.4 - Zynq UltraScale+ MPSoC: FSBL EL3 stack size is unused

Description

In the linker script for the 2015.4 FSBL for Zynq US+ MPSoC, the default stack sizes are set up as follows:


_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x4000;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 1024;

_EL0_STACK_SIZE = DEFINED(_ABORT_STACK_SIZE) ? _ABORT_STACK_SIZE : 1024;
_EL1_STACK_SIZE = DEFINED(_SUPERVISOR_STACK_SIZE) ? _SUPERVISOR_STACK_SIZE : 2048;
_EL2_STACK_SIZE = DEFINED(_IRQ_STACK_SIZE) ? _IRQ_STACK_SIZE : 1024;
_EL3_STACK_SIZE = DEFINED(_FIQ_STACK_SIZE) ? _FIQ_STACK_SIZE : 1024;

 

However, the .stack section only uses _STACK_SIZE, _EL{2,1,0}_STACK_SIZE.

Solution

The _EL3_STACK_SIZE entry is not used and can be removed from the linker script.

Other A53 applications (helloworld, peripheral test) do not have this entry.

AR# 65971
Date Created 11/13/2015
Last Updated 12/03/2015
Status Active
Type General Article
Devices
  • Zynq UltraScale+ MPSoC
Tools
  • Vivado Design Suite - 2015.4