In order to test the SGMII/1000BASE-X PHY configuration in Zynq, you will need to configure the on-board clock such that it will provide a reference clock of 125 MHZ to MAC.
This Answer Record provides a method to generate FSBL so that it will configure the MAC with a 125MHZ reference clock for the SGMII/1000BASE-X PHY modes.
Copy the files attached to this Answer Record to the SDK installation path.
There is no plan to include this into the Xilinx Official FSBL.
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