When generating a JESD204 PHY in Vivado 2015.3 with more than 4 lanes and where the "Starting Transceiver Location" parameter is not set at a QUAD boundary, the UltraScale Transceiver IP will be incorrectly generated.
The reason for this error is the JESD204 PHY IP is attempting to set the source of the reference clock to an incorrect location. The Vivado Tcl console reports the following error:
Designs that have the "Starting Transceiver Location" parameter set to a QUAD boundary or use 4 or less lanes are not affected by this issue.
The JESD204 PHY needs to be re-generated and the starting point of the transceiver channel needs to be at a QUAD boundary.
The UltraScale Transceiver can then be placed into the correct location by setting the channels in the constraint file of the design.
An example of setting the location constraints can be seen below.