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AR# 66243

VCS MX - Failure when trying to compile FIFO Generator v13.0 using vhdlan: "The actual error message has been suppressed for security reasons. Please contact the vendor of this file for resolution of this problem"

Description

I receive the following error when trying to simulate the FIFO Generator v13.0 IP. It occurs when parsing the design file "fifo_generator_v13_0_rfs.vhd".

Info-[SYNTAX-ENCRYPTED] VHDL syntactic or semantic error/warnings detected in the encrypted source file
The actual error message has been suppressed for security reasons. Please contact the vendor of this file for resolution of this problem.

Solution

This error can occur in the following scenarios:

1. No pre-compiled libraries. FIFO Generator v13.0 is the first version that does not have Verilog behavior simulation model.

In VHDL, there is no option to dynamically load a library in the form of -y/-v like in Verilog.

You will need to compile Xilinx simulation libraries using compile_simlib.


2. The -kdb switch is used in the vhdlan command in VCS 2015.09. This error occurs when you want to compile an encrypted IP with -kdb.

It errors out in VCS 2015.09 only, VCS-MX J-2014.12 works fine. 

You can work around the problem by not using the -kdb switch or by using an alternative version of VCS.


Note: -kdb is a non-default switch for compilation of our IP.

To avoid any adverse effects, Xilinx recommends that you pass default switches to IP source compilation.

AR# 66243
Date Created 12/15/2015
Last Updated 12/21/2015
Status Active
Type General Article
IP
  • FIFO Generator