Version Found: 1.0 (Rev1)
Version Resolved and other Known Issues: (Xilinx Answer 65443)
When the run bit is de-asserted and the IDLE-STOP control bit is set, the DMA Subsystem for PCI Express transfers the remaining data. Once it is all cleared, it should generate IDLE-STOP.
However, in the current release ( Vivado 2015.4), this does not happen. The DMA Subsystem for PCI Express driver in AXI Streaming mode looks for an IDLE_STOP interrupt, but due to the absence of IDLE_STOP interrupt, the driver hangs.
This article is part of the PCI Express Solution Centre
(Xilinx Answer 34536) - Xilinx Solution Center for PCI Express
To resolve the issue, install the patch attached to this answer record as described below.
After the patch is installed, the version of the DMA Subsystem for PCI Express core should indicate: v1.0 (Rev. 66500).
Note: "Version Found" refers to the version where the problem was first discovered.
The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.
02/20/2016 - Initial release
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