When I place a location constraint on the TDO pin, either as a schematic attribute or in a .ucf file, the following errors occur:
"ERROR:OldMap:69 - LOC constraint "P76" on TDO symbol "$I1" (pad signal=TDOOUT) not supported."
"ERROR:baste:16 - LOC constraint "P76" on TDO symbol "$I1" (pad signal=TDOOUT) not supported."
When I instantiate a TDO BUF in VHDL (FPGA Express Flow) and the TDO pin is also locked in the .ucf file, the following fatal error occurs:
"ERROR:baste:263 - The LOC constraint "P76" (a TESTDATA location) is not valid for symbol "M2A<4>.PAD" (pad signal=M2A<4>), which is being mapped to the following site types: CLKIOB IOB"
To avoid the error, do not put a LOC constraint on the TDO pin. This pin is already locked down to a specific location on the device.
For more information, see (Xilinx Answer 2449), (Xilinx Answer 3416), and (Xilinx Answer 3753).