UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 66686

Virtex-7 FPGA VC707 Evaluation Kit - UG885 (v1.6.1) - GTX Interface Connections for FPGA U1

Description

(UG885), VC707 Evaluation Board User Guide (v1.6.1) Table 1-11 lists the GTX Interface Connections for FPGA U1.

The MGT_BANK_119 connections do not match the VC707 schematic (rev 1.0). What are the correct connections?

Solution

Table 1-11 on page 34 of UG885 (v1.6.1) lists GTX interface connections for MGT Banks 115, 116, 117, 118, 119.

For MGT_BANK_119, the connections for GTXE2_CHANNEL_X1Y26 and GTXE2_CHANNEL_X1Y27 are incorrect.

The correct connection, confirmed in the VC707 schematic (rev 1.0) is as follows:

 

(UG885) v1.7 has been updated to reflect this.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
45382 Virtex-7 FPGA VC707 Evaluation Kit - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 66686
Date Created 02/23/2016
Last Updated 04/06/2016
Status Active
Type General Article
Boards & Kits
  • Virtex-7 FPGA VC707 Evaluation Kit