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AR# 67010

Vivado HLS 2016.1 : Why does the perfect loop example have poorer performance versus the imperfect loop example?


Perfect and imperfect loop examples are given in (UG902), and are provided for in the example designs. 

When synthesizing these two examples, the perfect loop example has less QOR than the imperfect loop example, even though there should be an improvement. 

Why is this?


The imperfect loop example contains conditional logic outside the inner loop which in theory should reduce the performance. The perfect loop example moves this conditional logic inside the inner loop with a conditional statement in order to improve performance.

In general, this methodology is the correct one to follow to improve performance. However, in this example, the synthesis tools have improved in their capability to determines the functionality of the logic.

In this example, the inner loop can be abstracted to a simple single statement equation that does not require a loop:

LOOP_J: for(j=0; j < 20; j++){
acc += A[i] * j;


acc = A[i] * ( 0 + 1 + 2 + .. 19 )

This is because A[i] is invariant in this lower loop.

However, because the perfect loop example contains conditional logic, this simplification can not be performed, resulting in poorer performance for this example.

The (UG902) section will be updated with a proper example showing the benefits of transforming imperfect loops to perfect loops.
AR# 67010
Date Created 04/11/2016
Last Updated 04/28/2016
Status Active
Type General Article
  • Vivado Design Suite - 2016.1